Conventional Pulse Width Modulated (PWM) Light Emitting Diode (LED) drivers suffer from high quiescent current, which is the standing current that flows in a circuit when the signal is not applied. Quiescent current is necessary to maintain accurate driving current when the PWM pulse is high. The tradeoff of high quiescent current versus accurate output LED current exists regardless of the circuit architecture. In general, high quiescent current means accurate output LED current, and low quiescent current means coarse output LED current.
FIG. 1 illustrates a basic block diagram for a conventional LED driver circuit 100 for driving an LED 108. In FIG. 1, driving circuit 100 includes a digital to analog converter (DAC) 102, a PWM controller 104, and a driver 106. A digital input signal 111 is converted to an analog signal 112 by DAC 102 when enable signal 110 is high. In an example embodiment, digital input signal 111 is an 8-bit signal. The duty cycle, or pulse width, of analog signal 112 is set by PWM controller 104, via a PWM signal 114. Driver 106 amplifies analog signal 112 as modulated by PWM signal 114 and outputs amplified signal 116 to LED 108. LED 108 emits light 118 corresponding to amplified signal 116.
FIG. 2 is a more detailed example of a conventional LED driver circuit 200 for driving LED 108. In FIG. 2, circuit 200 includes DAC 102, a current mirror 202, a current mirror 206, a voltage controller 204, and switch 104. Current mirror 202 includes two N-channel FETs 208 and 210. Current mirror 206 includes two P-channel FETs 216 and 218. Voltage controller 204 includes a cascade amplifier 212 and a P-channel FET 214.
In operation, DAC 102 accepts digital input signal 111 and outputs analog signal 112. DAC outputs analog signal 112 to control the current through LED 108 via current mirror 202 and current mirror 206. Voltage controller 204 provides a feedback mechanism to stabilize amplified signal 116 by adjusting the control voltage to the gate of FET 214, which ultimately minimizes the output differentiation between P-channel FETs 216 and 218. Specifically, a signal 220 from the drain of P-channel FET 216 and amplified signal 116 from the drain of P-channel FET 218 are supplied to inputs of cascade amplifier 212. Cascade amplifier 212 amplifies the difference between signal 220 and amplified signal 116. The amplified difference is used to drive the gate of FET 214. When amplified signal 116 becomes much greater than signal 220 and the amplified difference is sufficiently large, FET 214 turns on, thereby drawing more current through P-channel FET 216, thus increasing signal 220. As signal 220 increases due to the increased current pull from FET 214, amplified signal 116 decreases. At this point, the now-increased signal 220 and now-decreased amplified signal 116 are fed into cascade amplifier 212. Cascade amplifier 212 then amplifies the difference between now-increased signal 220 and now-decreased amplified signal 116. The amplified difference between now-increased signal 220 and now-decreased amplified signal 116 is insufficient to keep FET 214 on, so FET 214 again shuts down. In this manner, since terminal 116 is the input of LED 108, voltage controller 204 actually works as a feedback controller to monitor LED current and maintain the accuracy of the driver circuit.
FIG. 3 is an even more detailed schematic of an exemplary conventional LED driver circuit 300 for driving LED 108, wherein switch 104 of FIG. 2 is described in greater detail. Circuit 300 includes DAC 102, current mirror 202, current mirror 206, and voltage controller 204. In addition, circuit 300 includes a resistor 302, a resistor 308, a resistor 322, a filter capacitor 304, an output sampling capacitor 320, a N-channel FET 306, P-channel FETs 312, 314, 316, 318, and 324, and a NOT gate 310.
In operation, whenever amplified signal 116 flows through LED 108, amplified signal 116 will additionally feed back to the positive input terminal of cascade amplifier 212 through FET 324, resistor 322, and FET 318. Analog signal 112 from DAC 102 drives the gate of FET 306, which in turn controls the gate of FET 216. Signal 220 from FET 216 is fed back to the negative terminal of cascade amplifier 212. As discussed above, the voltage controller constructed by cascade amplifier 212 and FET 214 maintains a substantial equality between signal 220 and amplified signal 116. With such feedback control, amplified signal 116 remains substantially constant, which results in the brightness of LED 108 remaining substantially constant.
In circuit 300, FETs 208, 210, 306, and 216 act as a “super current mirror” to provide more accurate current control for the circuit. When DAC 102 is on, analog signal 112 drives the gate of FET 306, which drives the gate of FET 216, which in turn controls signal 220 through FET 210. The change signal 220 will be mirrored to analog signal 112 from DAC 102.
FET 312 acts as a PWM signal switch corresponding to switch 104 in FIG. 2. FET 314 acts as a switch between FET 216 and 218. FET 316 acts as a switch between LED 108 and positive input of cascade amplifier 212. The purpose of FETs 312, 314, 316, 318 and 324 are to provide a feedback loop to voltage controller 204.
In operation, when a pulse width modulation control signal 330 is high, FET 312 turns OFF, which drives the gates of FET 218 and FET 216 to low. As a result, FET 218 is turned ON and there is a current flow into LED 108. At the same time, NOT gate 310 inverts high pulse width modulation control signal 330 and outputs a low signal, which turns FET 314 and FET 316 ON. FET 314 and FET 316 then provide the feedback loops to the positive terminal and negative terminal of cascade amplifier 212, respectively. Amplified signal 116 is therefore monitored and controlled.
Further, when pulse width modulation control signal 330 is low, FET 312 turns OFF, which turns OFF FET 218. In this situation, no current flows into LED 108. At the same time, NOT gate 310 turns OFF FET 314 and turns OFF FET 316. As a result, no feedback is provided to the positive terminal and negative terminal of cascade amplifier 212. In this situation, LED current 116 not monitored and controlled.
Energy inefficiency is problem associated with the conventional LED driver circuits discussed above. Specifically, in each of circuits 100, 200 and 300, the high quiescent current wastes significant power from battery. For example, referring to circuit 300, since DAC 102 constantly ON, analog signal 112 and signal 222 constantly flow through FET 208 and FET 210, respectively, to ground. These currents flow even when LED 108 is OFF. In other words, the conventional LED driver circuit keeps drawing power regardless of the status of the LED. The energy inefficiency of the conventional LED driver circuits discussed above will be further described with reference to FIG. 4 and FIG. 5 below.
FIG. 4 illustrates a waveform of PWM signal 114 with 50% duty cycle versus analog signal 112 from DAC 102 indicated as waveform 402 in a conventional LED driving circuit. In this example, PMW signal 114 includes a low pulse 404 at time t0-t1, a low pulse 412 at time t2-t3, and a low pulse 414 at time t4-t5, each of which represents LED 108 being in an OFF state. PMW signal 114 additionally includes a high pulse 406 at time t1-t2, and a high pulse 408 at time t3-t4, each of which represents LED 108 being in an ON state. However, one can see that waveform 402 is always ON regardless of whether PWM signal 114 is low or high. Referring back to FIG. 3, whenever DAC 102 is ON, analog signal 112 and signal 222 flow into ground through current mirror 202. Consequently, the “all-time” ON DAC 102 wastes unnecessary energy at times when PWM signal 114 is in an OFF state. In the example of FIG. 4, it is clear that at times t2-t3 and t4-t5 analog signal 112 from DAC 102 is sent to ground and the energy corresponding thereto is wasted.
FIG. 5 illustrates waveform of PWM signal 114 with 1/256 duty cycle versus analog signal 112 from DAC 102 indicated as waveform 402 in a conventional LED driving circuit. In FIG. 5, it is evident that the conventional LED driver circuit wastes more energy when the PWM control signal has smaller duty cycle. In FIG. 5, PMW signal 114 includes a low pulse 502 at time t0-t1, a low pulse 504 at time tx-t3, a low pulse 506 at time ty-t5 and a low pulse on greater than time tz, each of which represents LED 108 being in an OFF state. PMW signal 114 additionally includes a high pulse 510 at time t1-tx, a high pulse 512 at time t3-ty and a high pulse 514 at time t5-tz, each of which represents LED 108 being in an ON state. In FIG. 5, the width of high pulses 510, 512, and 514 are very small, which means LED 108 is rarely ON. However, as DAC 102 is always ON, the LED driver circuit wastes energy when LED 108 is OFF. In the example of FIG. 5, it is clear that at times t0-t1, tx-t3, ty-t5 and time greater than tz, analog signal 112 from DAC 102 is sent to ground and the energy corresponding thereto is wasted.
What is needed is a LED driver circuit that is able to improve the power efficiency when the LED is in an OFF state.